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  RT8237A/b ? ds8237a/b-05 march 2012 www.richtek.com 1 ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. high efficiency single synchronous buck pwm controller general description the RT8237A/b pwm controller provides high efficiency, excellent transient response, and high dc output accuracy needed for stepping down high voltage batteries to generate low voltage cpu core, i/o, and chipset ram supplies in notebook computers. the constant on-time pwm control scheme handles wide input/output voltage ratios with ease and provides 100ns ? instant-on ? response to load transients while maintaining a relatively constant switching frequency. the RT8237A/b achieves high efficiency at a reduced cost by eliminating the current sense resistor found in traditional current mode pwms. efficiency is further enhanced by its ability to drive very large synchronous rectifier mosfets and enter diode emulation mode at light load condition. the buck conversion allows this device to directly step down high voltage batteries at the highest possible efficiency. the pre-set frequency selections minimize design effort required for new designs. the RT8237A/b is intended for cpu core, chipset, dram, or other low voltage supplies as low as 0.7v. the RT8237A is available in a wdfn-10l 3x3 package, the rt8237b is available in a wqfn-12l 2x2 package. features z wide input voltage range : 4.5v to 26v z output voltage range : 0.7v to 3.3v z built-in 0.5% 0.7v reference voltage z quick load-step response within 100ns z 4700ppm/ c programmable current limit by low side r ds(on) sensing z 4 selectable frequency setting z soft-start control z drives large synchronous-rectifier fets z integrated boot switch z built-in ovp/ocp/uvp z thermal shutdown z power good indicator z rohs compliant and halogen free applications z notebook computers z cpu core supply z chipset/ram supply as low as 0.7v z generic dc/dc power regulator pin configurations (top view) wdfn-10l 3x3 RT8237A wqfn-12l 2x2 rt8237b pgood cs rf fb boot ugate phase lgate vcc en 9 8 7 1 2 3 4 5 10 6 gnd 11 lgate fb phase vcc cs en ugate boot pgood gnd nc rf 6 5 4 12 10 11 1 2 3 9 8 7 gnd 13 rt8237 package type qw : wdfn-10l 3x3 (w-type) qw : wqfn-12l 2x2 (w-type) lead plating system g : green (halogen free and pb free) z : eco (ecological element with halogen free and pb free) a : wdfn-10l 3x3 b : wqfn-12l 2x2 - free datasheet http:///
RT8237A/b 2 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical application circuit marking information 37=ym dnn 37= : product code ymdnn : date code RT8237Agqw 35 : product code w : date code rt8237bgqw 37 : product code ymdnn : date code RT8237Azqw 35 : product code w : date code rt8237bzqw 37 ym dnn 35w 35w v c c c s u g a t e f b r t 8 2 3 7 a / b l g a t e b o o t p h a s e p g o o d g n d en l out v in v out v cc r1 r boot r ugate r oc_set r2* r fb1 r fb2 r3* c1 c boot c2 c3* c4* r5 c out c5* r lgate chip enable rf * : o p t i o n a l 0 1f 100k 470k 30k 0 0.1f 0 10f x 3 50v 0 5.1k 10k 330f x 2 16v c6 10f x 2 16v 1.05v 0.45h r rf free datasheet http:///
RT8237A/b 3 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. pin no. RT8237A rt8237b pin name pin function 1 6 pgood open drain power good indicator. high impedance indicates power is good. 2 7 cs current limit threshold setting input. connect a setting resistor to gnd and the current limit threshold is equal to 1/8 of the voltage at this pin. 3 8 en pwm enable pin. pull low to gnd to disable the pwm. 4 9 fb v out feedback input. connect fb to a resistor voltage divider from v out to gnd to adjust the output from 0.7v to 3.3v 5 10 rf switching frequency selection. connect a resistance to select switching frequency as shown in electrical characteristics. the switching frequency is detected and latched after startup. this pin also controls diode emulation mode or forced ccm selection. pull down to gnd with resistor : diode emulation mode. connect to pgood with resistor : forced ccm after pgood becomes high. 6 1 lgate gate drive output for the low side external mosfet. 7 2 vcc control voltage input provides the power for the buck controller, the low side driver and the bootstrap circuit for high side driver. bypass to gnd with a 1 f ceramic capacitor. 8 3 phase external inductor connection pin for pwm converter. it behaves as the current sense comparator input for low side mosfet r ds(on) sensing and reference voltage for on time generation. 9 4 ugate gate drive output for the high side external mosfet. 10 5 boot supply input for high side driver. connect through a capacitor to the floating node (phase) pin. --- 11 nc no internal connection. 11 (exposed pad) 12, 13 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. functional pin description free datasheet http:///
RT8237A/b 4 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. function block diagram min. t off qtrig 1-shot + - comp v ref s1 q latch s1 q latch + - ov + - uv 120% v ref 70% v ref + - 120% v ref thermal shutdown dem/fccm drv drv on-time compute 1-shot fb vcc ugate phase pgood gnd lgate rf boot trig en r q s x(-1/8) + - pwm + - 90% v ref ss timer por cs vcc phase 10a + - x(1/8) free datasheet http:///
RT8237A/b 5 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. electrical characteristics (v cc = 5v, t a = 25 c, unless otherwise specified) absolute maximum ratings (note 1) z vcc, fb, pgood, en, cs, rf to gnd ---------------------------------------------------------------------------- ? 0.3v to 6v z phase to gnd dc -------------------------------------------------------------------------------------------------------------------------- --- ? 0.3v to 32v <20ns ----------------------------------------------------------------------------------------------------------------------- - ? 8v to 38v z boot to phase ---------------------------------------------------------------------------------------------------------- ? 0.3v to 6v z ugate to phase -------------------------------------------------------------------------------------------------------- ? 0.3v to 6v dc -------------------------------------------------------------------------------------------------------------------------- --- ? 0.3v to 6v <20ns ----------------------------------------------------------------------------------------------------------------------- - ? 5v to 7.5v z lgate to gnd ------------------------------------------------------------------------------------------------------------- ? 0.3v to 6v dc -------------------------------------------------------------------------------------------------------------------------- --- ? 0.3v to 6v <20ns ----------------------------------------------------------------------------------------------------------------------- - ? 2.5v to 7.5v z power dissipation, p d @ t a = 25 c wdfn-10l 3x3 ------------------------------------------------------------------------------------------------------------- 0.952w wqfn-12l 2x2 ------------------------------------------------------------------------------------------------------------ 0.606w z package thermal resistance (note 2) wdfn-10l 3x3, ja ------------------------------------------------------------------------------------------------------- 105 c/w wdfn-10l 3x3, jc ------------------------------------------------------------------------------------------------------- 8.2 c/w wqfn-12l 2x2, ja ------------------------------------------------------------------------------------------------------- 165 c/w z lead temperature (soldering, 10 sec.) ------------------------------------------------------------------------------- 260 c z junction temperature ----------------------------------------------------------------------------------------------------- 150 c z storage temperature range -------------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body mode) ---------------------------------------------------------------------------------------------- 2kv mm (ma chine mode) ------------------------------------------------------------------------------------------------------ 200v recommended operating conditions (note 4) z input voltage, v in ---------------------------------------------------------------------------------------------------------- 4.5v to 26v z control voltage, v cc ------------------------------------------------------------------------------------------------------ 4.5v to 5.5v z junction temperature range -------------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range -------------------------------------------------------------------------------------------- ? 40 c to 85 c parameter symbol test conditions min typ max unit input power supply v cc quiescent supply current i q fb forced above the regulation point, en = 5v, -- 500 1250 a v cc shutdown current i shdn v cc current, en = 0v -- -- 1 a cs shutdown current cs pull to gnd -- -- 1 a fb error comparator threshold v ref dem 0.7005 0.704 0.7075 v dem, t a = ? 40 to 85 c (note 5) 0.697 0.704 0.711 free datasheet http:///
RT8237A/b 6 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit fb input bias current v fb = 0.735v ? 1 0.01 1 a v out voltage range 0.7 -- 3.3 v r rf = 470k (note 6) -- 290 -- r rf = 200k (note 6) -- 340 -- r rf = 100k (note 6) -- 380 -- switching frequency f sw r rf = 39k (note 6) -- 430 -- khz minimum off-time 250 400 550 ns current sensing cs source current i cs 9 10 11 a cs source current tc -- 4700 -- ppm/ c zero crossing threshold dem ? 10 -- 5 mv gnd ? phase, v cs = 2.4v 280 300 320 gnd ? phase, v cs = 1.6v 185 200 215 current limit threshold v limit gnd ? phase, v cs = 0.4v 40 50 60 mv phase ? gnd, v cs = 2.4v -- 300 -- phase ? gnd, v cs = 1.6v -- 200 -- negative current limit threshold phase ? gnd, v cs = 0.4v -- 50 -- mv protection function output uv threshold with respect to error comparator threshold 65 70 75 % ovp threshold with respect to error comparator threshold 115 120 125 % ov fault delay fb forced above ov threshold -- 5 -- s v cc under voltage lockout threshold uvlo falling edge, hysteresis = 100mv, pwm disabled below this level 3.7 3.9 4.1 v v out soft-start from en = high to v out = 95% -- 1300 -- s uv blank time from en signal going high -- 3 -- ms thermal shutdown t sd -- 150 -- c driver on resistance ugate drive source r ugatesr boot ? phase forced to 5v -- 1.8 3.6 ugate drive sink r ugatesk boot ? phase forced to 5v -- 1.2 2.4 lgate drive source r lgatesr lgate, high state -- 1.8 3.6 lgate drive sink r lgatesk lgate, low state -- 0.8 1.6 lgate rising (phase = 1.5v) -- 30 -- dead time ugate rising -- 30 -- ns internal boost charging switch on resistance vcc to boot, 10ma -- -- 80 en threshold logic-high v ih 1.8 -- -- en threshold voltage logic-low v il -- -- 0.5 v free datasheet http:///
RT8237A/b 7 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a low effective thermal conductivity single-layer test board per jedec 51-3. jc is measured at the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. note 5. guaranteed by design. not production tested. note 6. not production tested. test condition is v in = 8v, v out = 1.1v, i out = 10a using application circuit. parameter symbol test conditions min typ max unit mode decision v rf threshold for dem -- -- 0.5 v v rf threshold for fccm 1.8 -- -- v pgood trip threshold (falling, leaving pgood) measured at fb, with respect to reference, hysteresis = 3% 87 90 93 % trip threshold (rising, leaving pgood) measured at fb, with respect to reference, hysteresis = 3% 115 120 125 % fault propagation delay falling edge, fb forced below pgood trip threshold -- 2.5 -- s output low voltage i sink = 1ma -- -- 0.4 v leakage current high state, forced to 5v -- -- 1 a free datasheet http:///
RT8237A/b 8 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical operating characteristics efficiency vs. load current 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 10 100 load current (a) efficiency (%) v in = 8v, v out = 1.05v, r rf = 470k dem ccm efficiency vs. load current 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 10 100 load current (a) efficiency (%) dem ccm v in = 12v, v out = 1.05v, r rf = 470k efficiency vs. load current 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 10 100 load current (a) efficiency (%) dem ccm v in = 20v, v out = 1.05v, r rf = 470k switching frequency vs. load current 0.1 1 10 100 1000 0.001 0.01 0.1 1 10 100 load current (a) switching frequency (khz) 1 dem ccm v in = 12v, v out = 1.05v, r rf = 470k switching frequency vs. load current 0.1 1 10 100 1000 0.001 0.01 0.1 1 10 100 load current (a) switching frequency (khz) 1 dem ccm v in = 12v, v out = 1.05v, r rf = 200k switching frequency vs. load current 0.1 1 10 100 1000 0.001 0.01 0.1 1 10 100 load current (a) switching frequency (khz) 1 dem ccm v in = 12v, v out = 1.05v, r rf = 100k free datasheet http:///
RT8237A/b 9 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. cs source current vs. temperature 0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 temperature ( c) cs source current (a) v cc = 5v switching frequency v s. input voltage 200 225 250 275 300 325 350 375 400 425 450 475 500 4 6 8 10 12 14 16 18 20 22 24 26 input voltage (v) switching frequency (khz) 1 i out = 10a r rf = 39k r rf = 100k r rf = 200k r rf = 470k line regulation vs. temperature -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 -50 -25 0 25 50 75 100 125 temperature ( c) line regulation (% ) v in = 12v, v out = 1.05v, r rf = 470k , no load dem switching frequency vs. load current 0.1 1 10 100 1000 0.001 0.01 0.1 1 10 100 load current (a) switching frequency (khz) 1 v in = 12v, v out = 1.05v, r rf = 39k dem ccm load regulation vs. temperature -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 -50 -25 0 25 50 75 100 125 temperature ( c) load regulation (% ) v in = 12v, v out = 1.05v, i out = 10a, r rf = 470k ccm load transient response time (40 s/div) ugate (20v/div) v in = 12v, i out = 0a to 20a, v out = 1.05v lgate (5v/div) i out (10a/div) v out (50mv/div) free datasheet http:///
RT8237A/b 10 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ovp time (40 s/div) dem, v in = 12v, no load pgood (5v/div) v out (500mv/div) lgate (5v/div) power on from en time (1ms/div) dem, v in = 12v, no load v out (500mv/div) ugate (10v/div) pgood (5v/div) en (5v/div) power on from en time (1ms/div) ccm, v in = 12v, no load ugate (10v/div) pgood (5v/div) en (5v/div) v out (500mv/div) uvp ugate (20v/div) time (40 s/div) v in = 12v, v out = 1.05v pgood (5v/div) v out (1v/div) lgate (5v/div) free datasheet http:///
RT8237A/b 11 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. application information the RT8237A/b pwm controller provides high efficiency, excellent transient response, and high dc output accuracy needed for stepping down high voltage batteries to generate low voltage cpu core, i/o, and chipset ram supplies in notebook computers. richtek mach response tm technology is specifically designed for providing 100ns ? instant-on ? response to load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. the topology circumvents the poor load transient timing problems of fixed frequency current mode pwms, while avoiding the problems caused by widely varying switching frequencies in conventional constant on-time and constant off-time pwm schemes. the drv tm mode pwm modulator is specifically designed to have better noise immunity for such a single output application. pwm operation the mach response tm drv tm mode controller relies on the output filter capacitor's effective series resistance (esr) to act as a current sense resistor, so the output ripple voltage provides the pwm ramp signal. referring to the function block diagram, the synchronous ugate driver is turned on at the beginning of each cycle. after the internal one-shot timer expires, the ugate driver will be turned off. the pulse width of this one shot is determined by the converter's input voltage and the output voltage to keep the frequency fairly constant over the input voltage range. another one-shot sets a minimum off-time (400ns typ.). on-time control (ton/mode) the on-time one-shot comparator has two inputs. one input monitors the output voltage from the phase pin, while the other input samples the input voltage and converts it to a current. this input voltage proportional current is used to charge an internal on-time capacitor. the on-time is the time required for the voltage on this capacitor to charge from zero volts to v out , thereby making the on- time of the high side switch directly proportional to output voltage and inversely proportional to input voltage. the on-time is given by : t on = (v out / v in ) / f sw table 1. rf connection and switching frequency note : for dem, connect r rf to gnd; for ccm, connect r rf to pgood. enable and disable the en pin allows for power sequencing between the controller bias voltage and another voltage rail. the RT8237A/b remains in shutdown if the en pin is lower than 500mv. when the en pin rises above the v en trip point, the RT8237A/b will begin a new initialization and soft-start cycle. por, uvlo and soft-start power on reset (por) occurs when v cc rises above approximately 4.1v, in which the RT8237A/b resets the fault latch and prepares the pwm for operation. below 3.7v (min), the v cc under voltage lockout (uvlo) circuitry inhibits switching by keeping ugate and lgate low. a built-in soft-start is used to prevent the power supply input from surge currents after pwm is enabled. a ramping up current limit threshold eliminates the v out folded-back current during the soft-start duration. mode selection (rf) operation to select the operation mode, connect a resistor from the rf pin to either gnd or pgood. when the resistor is connected to gnd, the controller operates in diode emulation mode. when the resistor is connected to pgood, the controller operates in ccm mode. diode-emulation mode (r rf connected to gnd) in diode-emulation mode, the RT8237A/b automatically reduces switching frequency at light load conditions to maintain high efficiency. this reduction of frequency is achieved smoothly without increasing v out ripple or load regulation. as the output current decreases from heavy load condition, the inductor current is reduced and eventually comes to the point where its valley touches r rf (k ) switching frequency (khz) 470k 290 200k 340 100k 380 39k 430 free datasheet http:///
RT8237A/b 12 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. zero current, which is the boundary between continuous conduction and discontinuous conduction modes. by emulating the behavior of diodes, the low side mosfet allows only partial negative current to flow when the inductor freewheeling current reaches negative. as the load current is further decreased, it takes longer and longer to discharge the output capacitor to the level that requires the next ? on ? cycle. the on-time is kept the same as that in heavy load condition. on the contrary, when the output current increases from light load to heavy load, the switching frequency increases to the preset value as the inductor current reaches the continuous condition. this is shown in figure 1. the transition load point to the light load operation is calculated as follows : () ? ? in out load on vv it 2l figure 1. boundary condition of ccm/dcm i l t 0 t on slope = (v in -v out ) / l i l, peak i load = i l, peak / 2 where t on is the on-time. the switching waveforms may appear noisy and asynchronous when light loading causes diode-emulation operation, but this is a normal operating condition that results in high light load efficiency. trade-offs in dem noise vs. light load efficiency is made by varying the inductor value. generally, low inductor values produce a broader efficiency vs. load curve, while higher values result in higher full load efficiency (assuming that the coil resistance remains fixed) and less output voltage ripple. the disadvantages for using higher inductor values include larger physical size and degraded load transient response (especially at low input voltage levels). forced-ccm mode (fccm) the low noise, forced-ccm mode disables the zero- crossing comparator, which controls the low side switch on-time. this causes the low side gate drive waveform to become the complement of the high side gate drive waveform. this in turn causes the inductor current to reverse at light loads as the pwm loop to maintain duty ratio v out / v in . a fairly constant switching frequency is the benefit of forced-ccm mode, but this comes at a cost. the no load battery current can be up to 10ma to 40ma, depending on the external mosfets. current limit setting (cs) the RT8237A/b has a cycle-by-cycle current limiting control. the current limit circuit employs a unique ? valley ? current sensing algorithm. if the magnitude of the current sense signal at phase is above the current limit threshold, the pwm is not allowed to initiate a new cycle (see figure 2). in order to provide both good accuracy and a cost effective solution, the RT8237A/b supports temperature compensated mosfet r ds(on) sensing. the cs pin of the RT8237A/b is a multiplexed pin for pwm enable/disable control and current limit threshold setting. connect a setting resistor from this pin to gnd via an n-mosfet. when the n-mosfet is turned off, the pwm is disabled. when the n-mosfet is turned on, the pwm is enabled and the current limit threshold is equal to 1/8 of the voltage at this pin. choose a current limit resistor by following below equation : ripple load_oc ds(on) cs_oc oc_set cs cs i i8r v 2 r ii ?? ? ?? ?? == inductor current is monitored by the voltage between the gnd pin and the phase pin, so the phase pin should be connected to the drain terminal of the low side mosfet. i cs has a temperature coefficient to compensate the temperature dependency of the r ds(on) . gnd is used as the positive current sensing node, so gnd should be connected to the source terminal of the low side mosfet. as the comparison is being done during the off state, v l imit (current limit threshold) sets the valley level of the inductor current. thus, the load current at over current threshold, i load_oc , can be calcul ated as follows : () cs_oc ripple load_oc ds(on) cs_oc in out out ds(on) in v i i 8r 2 v vv v 1 8r 2lf v =+ ? =+ free datasheet http:///
RT8237A/b 13 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 2. ? valley ? current limit mosfet gate driver the high side driver is designed to drive high current, low r ds(on) n-mosfet(s). when configured as a floating driver, 5v bias voltage is delivered from the vcc supply. the average drive current is proportional to the gate charge at v gs = 5v times switching frequency. the instantaneous drive current is supplied by the flying capacitor between the boot and phase pins. to prevent shoot through, a dead time is internally generated between high side mosfet off to low side mosfet on, and low side mosfet off to high side mosfet on. the low side driver is designed to drive high current, low r ds(on) n-mosfet(s). the internal pull-down transistor that drives lgate low is robust, with a 0.5 typical on-resistance. a 5v bias voltage is delivered from the vcc supply. the instantaneous drive current is supplied by the flying capacitor between vcc and gnd. for high current applications, certain combinations of high and low side mosfets may cause excessive gate-drain coupling, which can lead to efficiency-killing, emi- producing shoot-through currents. this is often remedied by adding a resistor in series with boot, which increases the turn-on time of the high side mosfet without degrading the turn-off time (see figure 3). figure 3. reducing the ugate rise time power good output (pgood) the power good output is an open-drain output and requires a pull-up resistor. when the output voltage is 20% above or 10% below its set voltage, pgood gets pulled low. it is held low until the output voltage returns to within these tolerances once more. during soft-start, pgood is actively held low and is allowed to transition high only after soft- start is over and the output reaches 90% of its set voltage. there is a 2.5 s delay built into the pgood circuitry to prevent false transitions. output over voltage protection (ovp) the output voltage is continuously monitored for over voltage protection. when the output voltage exceeds 20% of its set voltage threshold, over voltage protection is triggered and the low side mosfet is latched on. this activates the low side mosfet to discharge the output capacitor. the RT8237A/b is latched once ovp is triggered and can only be released by vcc or en power on reset. there is a 5 s delay built into the over voltage protection circuit to prevent false transitions. output under voltage protection (uvp) the output voltage can be continuously monitored for under voltage protection. when the output voltage is less than 70% of its set voltage threshold, under voltage protection is triggered and then both ugate and lgate gate drivers are forced low. there is a 2.5 s delay built into the under voltage protection circuit to prevent false transitions. during soft-start, the uvp blanking time is 3ms. thermal shutdown (otp) the device implements an internal thermal shutdown to protect itself if junction temperature exceeds 150 c. when the junction temperature exceeds the thermal shutdown boot ugate phase r v in when the device is operating in the fccm, the negative current limit protects the external component. the negative current limit detect threshold is set as the same value as positive current limit but negative polarity. the threshold still is the valley value of the inductor current. in an over current condition, the current to the load exceeds the current to the output capacitor. thus, the output voltage falls and eventually crosses the under voltage protection threshold, inducing ic shutdown. i l t 0 i l, peak i limit i load_oc free datasheet http:///
RT8237A/b 14 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. threshold that the otp function will be triggered and the RT8237A/b will shut down and entry latch-off mode. in latch-off mode, the RT8237A/b can be reset by en or power input vcc. output voltage setting (fb) the output voltage can be adjusted from 0.7v to 3.3v by setting the feedback resistors, r1 and r2 (see figure 4). choose r2 to be approximately 10k and solve for r1 using the equation below : out ref r1 vv1 r2 ?? =+ ?? ?? where v ref is 0.704v (typ.). figure 4. setting v out with a resistive voltage divider fb r2 v out r1 inductor selection the inductor plays an important role in step-down converters because it stores the energy from the input power rail and then releases the energy to the load. from the viewpoint of efficiency, the dc resistance (dcr) of the inductor should be as small as possible to minimize the conduction loss. in addition, because the inductor takes up a significant portion of the board space, its size is also important. low profile inductors can save board space especially when there is a height limitation. however, low dcr and low profile inductors are usually cost ineffective. additionally, larger inductance results in lower ripple current, which means lower power loss. however, the inductor current rising time increases with inductance value. this means the transient response will be slower. therefore, the inductor design is a compromise between performance, size and cost. in general, the inductance is designed such that the ripple current ranges between 20% to 40% of the full load current. the inductance can be calculated using the following equation : ? = in out out min sw out_rated in vv v l fki v where k is the ratio between inductor ripple current and rated output current. input capacitor selection voltage rating and current rating are the key parameters in selecting an input capacitor. for a conservatively safe design, an input capacitor should generally have a voltage rating 1.5 times greater than the maximum input voltage. the input capacitor is used to supply the input rms current, which is approximately calculated using the following equation : ?? = ? ?? ?? out out rms out in in vv ii 1 vv the next step is to select a proper capacitor for rms current rating. placing more than one capacitor with low equivalent series resistance (esr) in parallel to form a capacitor bank is a good design. also, placing ceramic capacitor close to the drain of the high side mosfet is helpful in reducing the input voltage ripple at heavy load. output capacitor selection the output capacitor and the inductor form a low-pass filter in the buck topology. in steady-state condition, the ripple current that flows into or out of the capacitor results in ripple voltage. the output voltage ripples contains two components, v out_esr and v out_c . =? =? out_esr l out_c l out sw viesr 1 vi 8c f when load transient occurs, the output capacitor supplies the load current before the controller can respond. therefore, the esr will dominate the output voltage sag during load transient. the output voltage sag can be calculated using the following equation : = out_sag out vesri for a given output voltage sag specification, the esr value can be determined. another parameter that has influence on the output voltage sag is the equivalent series inductance (esl). a rapid change in load current results in di/dt during transient. therefore, esl contributes to part of the voltage sag. use a capacitor that has low esl to obtain better transient free datasheet http:///
RT8237A/b 15 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. performance. generally, using several capacitors in parallel will have better transient performance than using single capacitor for the same total esr. unlike the electrolytic capacitor, the ceramic capacitor has relative low esr and can reduce the voltage deviation during load transient. however, the ceramic capacitor can only provide low capacitance value. therefore, use a mixed combination of electrolytic capacitor and ceramic capacitor for better transient performance. although mach response tm drv tm dual ramp valley mode provides many advantages such as ease-of-use, minimum external component configuration, and extremely short response time, due to not employing an error amplifier in the loop, a sufficient feedback signal needs to be provided by an external circuit to reduce the jitter level. the required signal level is approximately 15mv at the comparing point. this gener ates v ripple = (v out /0.7) x 15mv at the outpu t node. the output capacitor esr should meet this requirement. mosfet selection the majority of power loss in the step-down power conversion is due to the loss in the power mosfets. for low voltage high current applications, the duty cycle of the high side mosfet is small. therefore, the switching loss of the high side mosfet is of concern. power mosfets with lower total gate charge are preferred in such applications. however, the small duty cycle means the low side mosfet is on for most of the switching cycle. therefore, the conduction loss tends to dominate the total power loss of the converter. to improve the overall efficiency, mosfets with low r ds(on) are preferred in circuit design. in some cases, more than one mosfet are connected in parallel to further decrease the on-state resistance. however, this depends on the low side mosfet driver capability and the budget. thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and figure 5. derating curve of maximum power dissipation difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction temperature is 125 c. the junction to ambient thermal resistance, ja , is layout dependent. for wdfn-10l 3x3 packages, the thermal resistance, ja , is 105 c/w on a standard jedec 51-3 single-layer thermal test board. for wqfn-12l 2x2 packages, the thermal resistance, ja , is 165 c/w on a standard jedec 51-3 single-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (105 c/w) = 0.952w for wdfn-10l 3x3 package p d(max) = (125 c ? 25 c) / (165 c/w) = 0.606w for wqfn-12l 2x2 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . for the RT8237A/b packages, the derating curves in figure 5 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 wdfn-10l 3x3 single-layer pcb wqfn-12l 2x2 free datasheet http:///
RT8237A/b 16 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. layout considerations layout is very important in high frequency switching converter design. if designed improperly, the pcb may radiate excessive noise and contribute to converter instability. certain points must be considered before starting a layout for the RT8237A/b. ` connect an rc low pass filter for vcc; 1 f and 10 are recommended. place the filter capacitor close to the ic. ` keep current limit setting network as close to the ic as possible. routing of the network should avoid coupling to high voltage switching node. ` connections from the drivers to the respective gate of the high side or the low side mosfet should be as short as possible to reduce stray inductance. ` all sensitive analog traces and components such as fb, gnd, en, cs, pgood, vcc, and rf should be placed away from high voltage switching nodes such as phase, lgate, ugate, or boot nodes to avoid coupling. use internal layer(s) as ground plane(s) and shield the feedback trace from power traces and components. ` current sense connections must always be made using kelvin connections to ensure an accurate signal, with the current limit resistor located at the device. ` power sections should connect directly to ground plane(s) using multiple vias as required for current handling (including the chip power ground connections). power components should be placed close to the ic to minimize loops and reduce losses. free datasheet http:///
RT8237A/b 17 ds8237a/b-05 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. outline dimension dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 d 2.950 3.050 0.116 0.120 d2 2.300 2.650 0.091 0.104 e 2.950 3.050 0.116 0.120 e2 1.500 1.750 0.059 0.069 e 0.500 0.020 l 0.350 0.450 0.014 0.018 w-type 10l dfn 3x3 package 1 1 2 2 note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options d 1 e a3 a a1 d2 e2 l b e see detail a free datasheet http:///
RT8237A/b 18 ds8237a/b-05 march 2012 www.richtek.com richtek technology corporation 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 d 1.900 2.100 0.075 0.083 e 1.900 2.100 0.075 0.083 e 0.400 0.016 d2 0.850 0.950 0.033 0.037 e2 0.850 0.950 0.033 0.037 l 0.250 0.350 0.010 0.014 w-type 12l qfn 2x2 package 1 1 2 2 note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options free datasheet http:///


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